Layout is one of the most basic skills of PCB design engineers. The quality of routing will directly affect the performance of the whole system. Most of the high-speed design theories will be implemented and verified by Layout. It can be seen that wiring is very important in the design of high-speed PCB. Next, aiming at some situations that may be encountered in actual routing, the rationality of the routing strategy is analyzed and some optimized routing strategies are given.
PCB design wiring do you know how to layout
Mainly from the right-angle line, differential line, snake line and other three aspects to elaborate.
1. Right-angled alignment
Right-angled routing is generally a situation that PCB routing requires to avoid as much as possible, and it has almost become one of the criteria to measure the quality of routing. How much impact will right-angled routing have on signal transmission? In principle, the right-angled line will change the width of transmission line, resulting in discontinuity of impedance. In fact, not only right-angled, sudden-angled and acute-angled lines may cause impedance changes.
The influence of right-angle alignment on signal is mainly reflected in three aspects:
First, the corner can be equivalent to the capacitive load on the transmission line to slow down the rising time.
Second, discontinuous impedance will cause signal reflection.
Third, EMI generated by right-angled tip.
The parasitic capacitance caused by the right angle of the transmission line can be calculated by the following empirical formula:
C = 61W (Er) 1/2/Z0
In the above formula, C means the equivalent capacitance of the corner (unit: pF), W means the width of the line (unit: inch), E R means the dielectric constant of the medium, and Z0 is the characteristic impedance of the transmission line. For example, for a 4Mils 50 ohm transmission line (epsilon R is 4.3), the capacitance of a right angle is about 0.010101pF, which can be used to estimate the rise time variation.
T10-90%=2.2*C*Z0/2=2.2*0.0101*50/2=0.556ps
It can be seen from the calculation that the capacitance effect caused by the right-angled wire is extremely small.
As the line width of the right-angled line increases, the impedance will decrease, which will result in a certain signal reflection phenomenon. We can calculate the equivalent impedance after the line width increases according to the impedance calculation formula mentioned in the transmission line chapter, and then calculate the reflection coefficient according to the empirical formula:
Rho=(Zs-Z0)/(Zs+Z0)
In general, the impedance change caused by right-angled line is between 7% and 20%, so the maximum reflection coefficient is about 0.1. Moreover, as can be seen from the figure below, the impedance of transmission line changes to the minimum in the long time of W/2 line, and then returns to the normal impedance after W/2 time. The whole time of impedance change is very short, often within 10 PS. Such a fast and small change is almost negligible for general signal transmission.
Many people have such an understanding of right-angled routing that the tip is easy to transmit or receive electromagnetic waves, resulting in EMI, which has become one of the reasons why many people think that right-angled routing is not possible. However, many actual test results show that the EMI of right-angled line is not more obvious than that of straight line. Perhaps the current instrument performance and test level restrict the accuracy of the test, but at least one problem is that the radiation of the right-angled line is less than the measurement error of the instrument itself.
Generally speaking, right-angled alignment is not as terrible as imagination. At least in applications below GHz, the equivalent of capacitance, reflection and EMI produced by high-speed PCB design engineers can hardly be reflected in TDR test. The emphasis of high-speed PCB design engineers should be placed on layout, power/ground design, routing design, through-hole design and other aspects. Of course, although the impact of right-angle alignment is not very serious, it does not mean that we can walk right-angle line in the future. Attention to details is the basic quality of every excellent engineer. Moreover, with the rapid development of digital circuits, the signal frequency processed by PCB engineers will continue to improve, and the RF design leading to more than 10 GHz. Domain, these small right angles may become the focus of high-speed problems.
2. Differential routing
Differential Signal is more and more widely used in high-speed circuit design. Differential signal is often used as the key signal in the circuit. What else is so popular? How to ensure good performance in PCB design? With these two questions in mind, we will discuss the next part.
What is differential signal? Generally speaking, the driver transmits two equivalent and inverse signals, and the receiver judges whether the logical state is "0" or "1" by comparing the difference between the two voltages. The pair of routes carrying differential signals is called differential routes.
Compared with ordinary single-ended signal routing, the most obvious advantages of differential signal lie in the following three aspects:
A. Anti-jamming ability is strong, because the coupling between two differential routes is very good, when there is noise interference outside, it is almost coupled to two lines at the same time, and the receiver only concerns about the difference between the two signals, so the external common-mode noise can be completely cancelled.
B. Effectively suppress EMI. In the same way, because the polarity of the two signals is opposite, their external electromagnetic fields can cancel each other. The tighter the coupling, the less the electromagnetic energy released to the outside world.
C. Precise timing positioning, because the switch change of differential signal is located at the intersection of two signals, unlike ordinary single-ended signal, which depends on the high and low threshold voltage, so it is less affected by process and temperature, which can reduce the timing error, and is more suitable at the same time.